Silicon single crystal wafers which are used as a material of semiconductor devices are generally manufactured by a process slicing a single crystal ingot produced by a Czochralski (CZ) method.
A method for growing the silicon single crystal ingot by the Czochralski method includes melting polycrystalline silicon in a quartz crucible, dipping a seed crystal into the surface of the melt, a necking process for growing an elongated crystal by pulling the seed crystal, and a shouldering process for growing the crystal in the radial direction to make the crystal have a target diameter. Subsequently, the silicon single crystal ingot having a predetermined diameter is subjected to a body growing process for growing the ingot to a desired length and then a tailing process for gradually reducing the diameter of the silicon single crystal ingot to separate the ingot from the silicon melt to complete the growth of the silicon single crystal ingot.
Upon the growth of the silicon single crystal by the CZ method, vacancies and interstitial silicon are introduced into the single crystal through a solid-liquid interface at which the crystal is formed.
When concentrations of the vacancies and interstitial silicon introduced into the single crystal reach a supersaturated state, the vacancies and interstitial silicon diffuse and aggregate to form vacancy defects (hereinafter, referred to as V defects) and interstitial defects (hereinafter, referred to as I defects). Since these V defects and I defects adversely affect properties of the wafer, the formation of V defects and I defects should be inhibited upon the growth of the silicon single crystal ingot.
In order to inhibit the formation of V defects and I defects, a method of controlling V/G, which is the ratio of a pulling speed V of the single crystal to a temperature gradient G at the solid-liquid interface, in a specific range is generally used, and the G of parameters included in the V/G is controlled through a hot-zone design of a single crystal growing apparatus.
Particularly, the G is generally controlled by changing the structure of an upper heat shielding body which is a hot-zone structure to adjust a melt-gap between the silicon melt and the upper heat shielding body. Herein, the upper heat shielding body refers to a heat shielding member which prevents radiant heat generated from the surface of the single crystal from being released to the outside in order to reduce temperature deviations between the surface and the central portion of the single crystal during the pulling of the silicon single crystal. That is, the melt-gap determined to minimize the temperature gradient difference between the central portion and the surface of the single crystal.
However, as the diameters of silicon single crystals ingot become larger recently, it is increasingly difficult to control the V/G within a defect-free margin. Particularly, controlling the G value only using the upper heat shielding body increases the consumption of the silicon melt during the pulling of the single crystal with the increase in the diameter of the silicon single crystal, so that there has been a limitation in that fluctuation in the melt-gap increases as much as that.
Therefore, it has been difficult to control the G value only using a structural change of the upper heat shielding body to maintain the V/G within a defect-free margin.
Moreover, after the ingot passes through the upper heat shielding body, the ingot grows in a water-cooled tube, and the water-cooled tube rapidly cools the ingot, so that it is difficult to control the cooling rate of the ingot in a temperature zone following the upper heat shielding body. Accordingly, the outer portion of the ingot rapidly cools due to the water-cooled tube, thereby causing an increase in the temperature difference between the central portion and the surface of the ingot and thus making it difficult to control the G value.
Furthermore, in a cooling temperature zone following the formation of V defects and I defects, defects such as oxygen precipitate nuclei are formed upon the cooling of the ingot, and it is thus required to control the cooling rate of the ingot even in the temperature zone. Particularly, as the diameters of wafers become larger than 300 mm recently, deviations of the cooling rate between the central portion C and the outer portion E of the ingot become even larger. Subsequently, machining wafers produced from the ingot leads to various crystal defects in the surfaces of the wafers, i.e., greater differences in concentrations of bulk micro defects (BMD) and oxygen between the central portion and the outer portion of the wafer.